With the development of semiconductor technology, one integrated circuit (IC) chip will integrate pluralities of functional devices, which comprise different Field Effect Transistors (FETs) respectively. The multiple gate oxide process has become a common method to form different FETs in a same chip.
Nowadays, varieties of multiple gate oxide processes are provided. FIG. 1A to FIG. 1D show cross-sectional views of a dual gate oxide device in the conventional manufacturing process. As shown in FIG. 1A, the silicon substrate 11 with shallow trench isolations 12 formed therein and silicon oxide thin film 13 deposited thereon is coated with photoresist 14. As shown in FIG. 1B, exposure and development is applied to the photoresist 14 so as to divide the silicon oxide thin film 13 into an area 15 which is to be etched and an area 16 which is covered with the remained photoresist 14. Then the silicon oxide thin film 13 in the area 15 is completely removed by wet etching as shown in FIG. 1C. Afterwards, as shown in FIG. 1D, the rest of the photoresist 14 is removed and then silicon oxide is deposited again to form silicon oxide films with different thickness on the silicon oxide film 13 in areas 15 and 16, so as to form the so-called dual gate oxide structure. Then, different FETs can be manufactured in the areas 15 and 16.
In the conventional method mentioned above, the wet etching process for the silicon oxide thin film 13 in the area 15 is performed by placing the silicon substrate 11 with the silicon oxide thin film 13 into an acid solution such as HF. However, when the acid solution etches the silicon oxide thin film 13, it also makes effects on the photoresist 14 and forms process defects mainly including photoresist residue and SiC deposition. Specifically, the photoresist residue is formed because the photoresist will be eroded by the acid solution and some of the high molecular compounds therein will be delaminated, which will form the defects on the silicon substrate surface. On the other hand, the formation mechanism of the SiC deposition is that with the reaction of the acid solution HF and the silicon oxide, SiF6 is formed, the SiF6 then will react with the high molecular compounds in the photoresist to produce SiC particles, and then the SiC deposition is formed on the substrate.
To solve the problems mentioned above, following methods are utilized to prevent forming photoresist defects during the wet etching process: 1) baking the photoresist layer after the exposure and development so as to increase its density, thereby making the acid solution difficult to immerse into the gaps between the high molecular compounds to react with the compounds and form the defects; 2) performing UV curing after the exposure and development to form cross-linked bond with the high molecular compounds on the surface of the photoresist, which can improve the erosion-resisting ability of the photoresist to the acid solution.
However, there still exist some problems to be solved in the conventional methods of preventing photoresist defects mentioned above. In the first method, the baking temperature cannot be too high and the baking time cannot be too long, otherwise the photolithography patterns of the photoresist will be deformed, which may further have negative effects on the throughput. Moreover, the density of the baked photoresist layer may not meet the requirements of erosion-resistance to acid solutions due to the temperature and time limitations. In the second method, the UV curing process which is performed after the photolithography process may result in contractions in the thickness of the photoresist layer and the linewidth of the photoresist pattern. Generally, the contraction rate of the photoresist thickness can be 15% to 25%, and the linewidth can be reduced by 10˜30 nm compared with that after the exposure and development process. As a result, the linewidth as well as the quality of the dual gate oxide device to be formed later may be affected.